{"title":"A 27-nV/√Hz 0.015-mm2 three-stage operational amplifier with split active-feedback compensation","authors":"Hicham Haibi, I. Akita, M. Ishida","doi":"10.1109/ASSCC.2013.6691058","DOIUrl":null,"url":null,"abstract":"This paper presents a low-noise small-area three-stage operational amplifier using split active-feedback compensation (SAFC) which is suitable for biomedical arrayed sensors. The proposed SAFC amplifier only requires a small capacitance for phase compensation, while it can achieve a low input-referred noise by increasing the first-stage transconductance without sacrificing the phase margin. The proposed SAFC amplifier has been implemented using a standard 0.18-μm CMOS process. The measurement results show that the proposed SAFC amplifier achieves >120-dB DC gain, 6.2-MHz gain bandwidth product, and phase margin of 60°. The measured input-referred noise is 27 nV/√Hz. The current dissipation is measured as 177 μA at a power supply of 1.5 V and it achieves a noise efficiency factor of 14.","PeriodicalId":296544,"journal":{"name":"2013 IEEE Asian Solid-State Circuits Conference (A-SSCC)","volume":"142 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-12-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 IEEE Asian Solid-State Circuits Conference (A-SSCC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASSCC.2013.6691058","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 6
Abstract
This paper presents a low-noise small-area three-stage operational amplifier using split active-feedback compensation (SAFC) which is suitable for biomedical arrayed sensors. The proposed SAFC amplifier only requires a small capacitance for phase compensation, while it can achieve a low input-referred noise by increasing the first-stage transconductance without sacrificing the phase margin. The proposed SAFC amplifier has been implemented using a standard 0.18-μm CMOS process. The measurement results show that the proposed SAFC amplifier achieves >120-dB DC gain, 6.2-MHz gain bandwidth product, and phase margin of 60°. The measured input-referred noise is 27 nV/√Hz. The current dissipation is measured as 177 μA at a power supply of 1.5 V and it achieves a noise efficiency factor of 14.
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