Hierarchical modeling and scalable algorithms for in-situ analysis of integrated circuit packages

Z. Peng, Yang Shao, Shu Wang
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Abstract

The objective of this work is to investigate high-resolution and high-performance computational methods for the first-principles analysis of in-situ product-level integrated circuit (IC) packages. The novelties and key technical approaches of the proposed work include: (i) a scalable geometry-based domain decomposition (DD) method to conquer the geometric complexity of physical domain, which leads to quasi-optimal convergence that is provably scalable for multi-scale objects. Moreover, it results in parallel and scalable computational algorithms to reduce the time complexity via high performance computing facilities; (ii) a hierarchical multi-scale simulator for high-definition IC package systems, in which the technical ingredients include a skeleton-based multi-region multi-solver method and a variational macro-micro analysis for multi-scale modeling. The capability and benefits of the algorithms are explored and illustrated through several real-world 3D IC package applications.
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集成电路封装现场分析的分层建模和可扩展算法
这项工作的目的是研究高分辨率和高性能的计算方法,用于原位产品级集成电路(IC)封装的第一性原理分析。本文的创新点和关键技术方法包括:(1)基于可扩展几何的域分解(DD)方法克服了物理域的几何复杂性,该方法可导致准最优收敛,并且可证明该方法可扩展到多尺度对象。此外,通过高性能的计算设施,它产生了并行和可扩展的计算算法,以降低时间复杂度;(ii)用于高清晰度IC封装系统的分层多尺度模拟器,其中技术成分包括基于骨架的多区域多求解方法和用于多尺度建模的变分宏观-微观分析。通过几个实际的3D集成电路封装应用,对算法的能力和优点进行了探讨和说明。
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