A novel cross point one-resistor (0T1R) conductive bridge random access memory (CBRAM) with ultra low set/reset operation current

F. Lee, Y. Y. Lin, M. Lee, W. Chien, H. Lung, K. Hsieh, C. Y. Lu
{"title":"A novel cross point one-resistor (0T1R) conductive bridge random access memory (CBRAM) with ultra low set/reset operation current","authors":"F. Lee, Y. Y. Lin, M. Lee, W. Chien, H. Lung, K. Hsieh, C. Y. Lu","doi":"10.1109/VLSIT.2012.6242464","DOIUrl":null,"url":null,"abstract":"Using the dual Vth characteristics of a multi-layer SiO2/SiO2/Cu-GST conducting bridge (CB) structure we can construct a one-resistor cell without an access device (0T1R). Like 1T Flash memory the Vth is used to store the logic state thus leaving all devices always at high resistance state and a separate isolation device is not needed. The Vth of the cell is determined by the presence of CB in the SiO2 layer only. The CB in the SiO2 is present only temporarily during reading, and is spontaneously dissolved afterward. This spontaneous rupture of the filament in the SiO2 layer greatly reduces the switching current as well as reducing the read disturb. The mechanism for the spontaneous rupture phenomenon is investigated.","PeriodicalId":266298,"journal":{"name":"2012 Symposium on VLSI Technology (VLSIT)","volume":"66 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 Symposium on VLSI Technology (VLSIT)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIT.2012.6242464","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4

Abstract

Using the dual Vth characteristics of a multi-layer SiO2/SiO2/Cu-GST conducting bridge (CB) structure we can construct a one-resistor cell without an access device (0T1R). Like 1T Flash memory the Vth is used to store the logic state thus leaving all devices always at high resistance state and a separate isolation device is not needed. The Vth of the cell is determined by the presence of CB in the SiO2 layer only. The CB in the SiO2 is present only temporarily during reading, and is spontaneously dissolved afterward. This spontaneous rupture of the filament in the SiO2 layer greatly reduces the switching current as well as reducing the read disturb. The mechanism for the spontaneous rupture phenomenon is investigated.
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一种具有超低定复位电流的交叉点单电阻(0T1R)导电桥随机存取存储器(CBRAM)
利用多层SiO2/SiO2/Cu-GST导电桥(CB)结构的双Vth特性,我们可以构建无接入器件(0T1R)的单电阻电池。像1T闪存一样,Vth用于存储逻辑状态,从而使所有设备始终处于高电阻状态,并且不需要单独的隔离设备。电池的v值仅由二氧化硅层中CB的存在决定。二氧化硅中的炭黑在读取时只是暂时存在,读取后会自发溶解。这种在SiO2层中灯丝的自发断裂大大减小了开关电流,也减少了读干扰。对自发破裂现象的机理进行了研究。
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