{"title":"A high-speed lossless embedded compression codec for high-end LCD applications","authors":"Yu-Hsuan Lee, Yu-Yu Lee, Huang-Zueng Lin, T. Tsai","doi":"10.1109/ASSCC.2008.4708759","DOIUrl":null,"url":null,"abstract":"Due to the great evolution of LCD panel technology, the memory bandwidth of display media system is significantly increased. Its impact on system cost, EMI of transmission interface, and memory bandwidth almost dominates the performance of entire display media system. To eliminate this effect, a high-speed lossless embedded compression algorithm with pipelining and parallel VLSI architecture is proposed. With associated geometric-based probability model (AGPM), the compact coding flow is constructed by geometric-based binary code and content-adaptive Golomb-Rice code to achieve high-speed capability. The entire codec is implemented by TSMC 0.18-mum 1P6M CMOS technology with Artisan cell library. The processing capability of two-level parallelism achieves Full-HD 1080p@60 Hz with RGB components, and the four-level parallelism can further support 120 Hz double frame rate (DFR) technique for high-end LCD applications.","PeriodicalId":143173,"journal":{"name":"2008 IEEE Asian Solid-State Circuits Conference","volume":"150 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2008-12-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"14","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2008 IEEE Asian Solid-State Circuits Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASSCC.2008.4708759","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 14
Abstract
Due to the great evolution of LCD panel technology, the memory bandwidth of display media system is significantly increased. Its impact on system cost, EMI of transmission interface, and memory bandwidth almost dominates the performance of entire display media system. To eliminate this effect, a high-speed lossless embedded compression algorithm with pipelining and parallel VLSI architecture is proposed. With associated geometric-based probability model (AGPM), the compact coding flow is constructed by geometric-based binary code and content-adaptive Golomb-Rice code to achieve high-speed capability. The entire codec is implemented by TSMC 0.18-mum 1P6M CMOS technology with Artisan cell library. The processing capability of two-level parallelism achieves Full-HD 1080p@60 Hz with RGB components, and the four-level parallelism can further support 120 Hz double frame rate (DFR) technique for high-end LCD applications.
京公网安备 11010802042870号
京ICP备2023020795号-1
分享
求助内容：
应助结果提醒方式：
扫码关注我们
