A Built In Test circuit for waveform classification at high frequencies

K. Poulos, T. Haniotakis
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Abstract

We introduce a new Build In Test (BIT) signature generator for functional verification and output classification of RF integrated circuits. The proposed circuit is a single rectifier-based MOS transistor, with the substrate and gate independently biased to control source terminal voltage range, followed by a passive RC filter. The proposed technique correlates the Circuit Under Test (CUT) characteristics with the dc voltage provided at the output of the BIT circuit. The output from the proposed circuit is used as signature from which we verify the performance specifications and also characterize the CUT output waveform with respect to amplitude and shape. In normal operation the proposed low cost test scheme ensures the minimum effect at the performance of the measured circuit under test since the only additional load is the source of the MOS transistor attached to it.
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用于高频波形分类的内建测试电路
介绍了一种用于射频集成电路功能验证和输出分类的内置测试(BIT)签名发生器。所提出的电路是一个基于整流器的单一MOS晶体管,衬底和栅极独立偏置以控制源端电压范围,然后是一个无源RC滤波器。所提出的技术将被测电路(CUT)特性与比特电路输出端提供的直流电压相关联。所提出电路的输出用作我们验证性能规格的签名,并且还表征了CUT输出波形的幅度和形状。在正常工作中,所提出的低成本测试方案确保对被测电路性能的影响最小,因为唯一的附加负载是附加在其上的MOS晶体管的源。
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