Characterization of density of trap states at the back interface of SIMOX wafers

A. Takubo, T. Hanajiri, T. Sugano, K. Kajiyama
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Abstract

We measured the density of the trap states at the interface of SIMOX (Separation by Implanted Oxygen) wafers by high frequency C-V measurements of MOS diodes fabricated on SIMOX wafers. SIMOX structures with p-type or n-type silicon substrates are found to have traps of about 10/sup 12/ cm/sup -2/ eV/sup -1/ at the back interface. We tried to estimate the density of the trap states at the front interface, too.
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SIMOX晶圆后界面阱态密度的表征
我们通过在SIMOX晶片上制作的MOS二极管的高频C-V测量,测量了SIMOX晶片界面的陷阱态密度。具有p型或n型硅衬底的SIMOX结构在背面界面处具有约10/sup 12/ cm/sup -2/ eV/sup -1/的陷阱。我们也试着估计在前界面处的阱态密度。
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