A critical review of charge-trapping NAND flash devices

Abstract

This paper carefully analyzes various charge-trapping NAND Flash devices including SONOS, MANOS, BE-SONOS, BE-MANOS, and BE-MAONOS. The erase mechanisms using electron de-trapping or hole injection, and the role of the high-k top dielectric (Al2O3) are critically examined. In addition to the intrinsic charge-trapping properties, the STI edge geometry in the NAND array also plays a crucial role in determining the programming/erasing and reliability characteristics. Erase saturation and incremental-step-pulse programming (ISPP) characteristics are strongly affected by the STI edge effects. Our analysis of recent progress provides a clear understanding to charge-trapping NAND devices and serves as a guideline for future development.