A broadband upconverter IC

D. Neilson, B. Allen, M. Kintis, M. Hoppe, S. Maas
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引用次数: 9

Abstract

The authors describe the design and performance of a single-chip upconverter IC consisting of a doubly balanced dual-gate FET mixer, a four-stage local oscillator (LO) amplifier, and a single-stage IF amplifier. Due to a novel mixer topology, the input passband of the converter extended from DC to 5 GHz, the LO frequency range was 8 GHz to 16 GHz, and the IF output frequency range was 8 to 10 GHz. The primary design goals for this upconverter were a high third-order intermodulation intercept point (IP/sub 3/) and good spurious-response rejection. Advanced FET models were used to optimize the circuit's intercept points. The converter exhibited an IP/sub 3/ of 23.5 dBm across most of the band; second-order intercept points (IP/sub 2/) for spurious responses were greater than +40 dBm.<>
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一种宽带上变频集成电路
介绍了一种由双平衡双栅FET混频器、四级本振(LO)放大器和单级中频放大器组成的单片上变频集成电路的设计和性能。由于采用了新颖的混频器拓扑结构,转换器的输入通带从DC扩展到5ghz,本端频率范围为8 GHz至16 GHz,中频输出频率范围为8 GHz至10 GHz。该上变频器的主要设计目标是高三阶互调截获点(IP/sub 3/)和良好的杂散响应抑制。采用先进的场效应管模型优化电路的截点。该变换器在大部分频带上的IP/sub /为23.5 dBm;伪响应的二阶截距点(IP/sub 2/)大于+40 dBm.>
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