The formation of sub-micro partial SOI materials by SIMOX technology

Abstract

In this paper, we try to fabricate sub-micro windows in BOX layer. The pattern thermal oxide layer we used for mask implantation was shown. The typical widths of thermal oxide strips are 150nm and /spl sim/75nm and the space of each strips is 1/spl mu/m. The O/sup +/ ions are implanted through the patterned masking oxide. The XTEM images of the SOI structures are shown. The widths of BOX windows are 236nm (left) and 150 nm (right). It is very interesting that the windows are about 75 nm wider than the corresponding masking strips.