Feed-forward ΔΣ modulators topologies design for broadband communications applications

H. Daoud, S. B. Salem, S. Zouari, M. Loulou
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引用次数: 1

Abstract

This paper presents a design methodology for low-distortions (feed-forward) Delta-Sigma (ΔΣ) modulators topologies used in next generations wireless applications. Thus, optimized folded cascode OTA and telescopic OTA gain-boosting are selected to implement the switched capacitor (SC) integrator. First, a second order ΔΣ modulator is implemented for 2MHz bandwidth. Second, a 2–2 cascaded ΔΣ modulator is designed for 2MHz and 10MHz bandwidths in order to improve the modulator performances. These modulators are implemented using system-level simulations as well as device-level simulations implemented with SC circuits in AMS 0.35μm CMOS process. Device-level simulations results indicate that the 2nd and the 2–2 cascaded ΔΣ modulators achieve respectively SNRs of 43dB and 38dB over bandwidths of 2MHz and 10MHz with over-sampling ratios 16 and 8.
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前馈ΔΣ调制器拓扑设计宽带通信应用
本文提出了一种用于下一代无线应用的低失真(前馈)Delta-Sigma (ΔΣ)调制器拓扑的设计方法。因此,选择优化的折叠级联码OTA和伸缩OTA增益提升来实现开关电容(SC)积分器。首先,实现了2MHz带宽的二阶ΔΣ调制器。其次,为了提高调制器的性能,在2MHz和10MHz带宽下设计了2-2级联ΔΣ调制器。这些调制器是通过系统级仿真实现的,以及在AMS 0.35μm CMOS工艺中使用SC电路实现的器件级仿真。器件级仿真结果表明,第2级联ΔΣ调制器和2-2级联ΔΣ调制器在2MHz和10MHz带宽下的信噪比分别为43dB和38dB,过采样比分别为16和8。
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