{"title":"Gauss-Newton image registration with CUDA","authors":"Manal Jalloul, M. Baydoun, M. A. Al-Alaoui","doi":"10.1109/ICECS.2011.6122274","DOIUrl":null,"url":null,"abstract":"Image registration is the process of matching different images whether 2D or 3D of certain similar or common properties for different purposes. This work addresses this field using a Gauss-Newton optimization approach. The problem is basically formulated as minimizing a cost function that is then solved by a backtracking line search. Since this is considered as a demanding problem especially for larger data, this paper presents the solution using the CUDA GPU architecture provided by Nvidia [1] in order to achieve better performance and reduce timing through parallelism.","PeriodicalId":251525,"journal":{"name":"2011 18th IEEE International Conference on Electronics, Circuits, and Systems","volume":"13 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2011 18th IEEE International Conference on Electronics, Circuits, and Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICECS.2011.6122274","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3
Abstract
Image registration is the process of matching different images whether 2D or 3D of certain similar or common properties for different purposes. This work addresses this field using a Gauss-Newton optimization approach. The problem is basically formulated as minimizing a cost function that is then solved by a backtracking line search. Since this is considered as a demanding problem especially for larger data, this paper presents the solution using the CUDA GPU architecture provided by Nvidia [1] in order to achieve better performance and reduce timing through parallelism.