Invited talk: 2.5D and 3D technology advancements for systems

Abstract

Silicon interposer packaging and thin die stacking technologies with through-silicon-vias (TSV's) can improve performance, increase bandwidth, improve power efficiency, and reduce costs for systems applications. Proper system architecture and designs are critical to achieve these system benefits using silicon interposer packaging (2.5D) and 3-dimensional (3D) die stacking technologies. 2.5D and 3D heterogeneous multi-chip integration technologies have numerous challenges but through advancements they each can provide significant system benefits when compared to traditional packaging integration solutions. Portable electronics such as smart phones, sensors and bio-medical systems can benefit from “technology miniaturization” with increasing function in product generations, improved power efficiency, lower cost and high volume scale up capability associated with this small size and wafer or panel level processing. Large systems can also benefit from 2.5D and 3D technologies by taking advantage of close proximity computing, higher bandwidth with low latency, and power efficiencies to achieve higher performance and lower energy per operation.