{"title":"Appendix A3: Counters, Shift Registers, Input, and Output with an FSM","authors":"","doi":"10.1002/9781119782735.app3","DOIUrl":null,"url":null,"abstract":"© 2021 John Wiley & Sons Ltd. Published 2021 by John Wiley & Sons Ltd. Companion website: www.wiley.com/go/minns/digitalsystemdesign This appendix contains a number of techniques to help in the development of synchronous binary counters and shift registers. These are used in some of the designs covered in various chapters throughout this book. There is also an example of the memory tester FSM using the Logisim Simulator.","PeriodicalId":396893,"journal":{"name":"Digital System Design using FSMs","volume":"38 8","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2021-06-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Digital System Design using FSMs","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1002/9781119782735.app3","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
附录A3:计数器、移位寄存器、FSM的输入和输出
©2021 John Wiley & Sons Ltd2021年由John Wiley & Sons Ltd出版。配套网站:www.wiley.com/go/minns/digitalsystemdesign这个附录包含了许多有助于开发同步二进制计数器和移位寄存器的技术。在本书的各个章节中，它们被用于一些设计中。还有一个使用Logisim模拟器的内存测试器FSM的示例。
本文章由计算机程序翻译，如有差异，请以英文原文为准。
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