Determination of generation lifetime in silicon-on-insulator (SOI) substrates using a three-terminal capacitance-time response

Abstract

Capacitance-voltage (C-V) and capacitance-time (C-T) measurements used to yield valuable material parameters in thin-film silicon-on-insulator MOS capacitors are considered. The authors previously demonstrated (1989) that a two-terminal C-V can yield the thickness of the body (silicon overlayer) and the buried oxide. However, a more comprehensive assessment of SOI material necessitates the evaluation of the generation lifetime in the body region, as this quantity directly correlates with leakage current and is crucial in determining parasitic effects such as lateral bipolar action in SOI transistors. It is shown that the minority carrier generation lifetime can be obtained by monitoring the capacitance between the gate and substrate after the application of a step voltage.<>