Full-swing logic circuits in a complementary BiCMOS technology

Abstract

It has been demonstrated that full-swing complementary MOS/bipolar logic (FS-CMBL) circuits utilizing a push-pull emitter-follower driver and base-emitter shunting to achieve full swing are potentially advantageous for scaled BiCMOS technologies. In these circuits, delay and power consumption depend on characteristics of the base-to-base clamping diode, parasitic capacitances at the two base nodes, and techniques used to achieve full swing. Variations of full-swing complementary circuits utilizing different clamping diodes and full-swing techniques, implemented in a full-complementary BiCMOS technology, are presented. The FS-CMBL circuits demonstrate a clear advantage over the conventional npn-only, partial-swing BiCMOS circuit