Efficient FPGA implementation of modified DWT for JPEG2000

Abstract

An efficient implementation of discrete wavelet transform (DWT) in JPEG2000 is designed with low memory and high pipeline architecture. Considering the limited dynamic range of wavelet coefficients, a modified scheme of integer-to-integer discrete wavelet transform based on fixed-point manipulation is proposed by preserving efficiently fractions of coefficients in lifting steps. This scheme ensures higher computational precision in DWT and accordingly improves the compression quality. The corresponding line-based FPGA lifting scheme is put forward from hardware perspective. In a parallel way, transform can be row-wise and column-wise executed. Prototyped onto Xilinx Virtex-II FPGA, the proposed architecture requires fewer resources and memory accesses, but reaches a higher processing throughput. Experimental results provide parameters as follows. For an image with resolution 1024×1024, the inputting sampling is up to 61 Mpixels/s when DWT is working at the clock of 65 MHz. Internal memory of only 5 rows is required for the 9/7 filter to perform one-level 2-D decomposition. The completion of multi-level DWT is within the time T that an image is transmitted in line order.