Yin-Cheng Chang, S. Hsu, D. Chang, Jeng-Hung Lee, Shuw-Guann Lin, Y. Juang
{"title":"A de-embedding method for extracting S-parameters of vertical interconnect in advanced packaging","authors":"Yin-Cheng Chang, S. Hsu, D. Chang, Jeng-Hung Lee, Shuw-Guann Lin, Y. Juang","doi":"10.1109/EPEPS.2011.6100231","DOIUrl":null,"url":null,"abstract":"An extracting methodology is proposed to characterize the performance of interconnect. This work successfully extracts the interconnect by using transmission matrix (T-matrix) for calculation. This method exhibits its validity without frequency limitation mathematically. It can deal with most kinds of vertical interconnects including bond-wires, micro-bumps and through-silicon-vias (TSVs). Details of equations and measurement procedure are reported in this work. The bump in flip-chip process is taken as an example. The analysis is depicted and the measured results are performed for verification up to 20 GHz.","PeriodicalId":313560,"journal":{"name":"2011 IEEE 20th Conference on Electrical Performance of Electronic Packaging and Systems","volume":"489 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-12-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"14","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2011 IEEE 20th Conference on Electrical Performance of Electronic Packaging and Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EPEPS.2011.6100231","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 14
Abstract
An extracting methodology is proposed to characterize the performance of interconnect. This work successfully extracts the interconnect by using transmission matrix (T-matrix) for calculation. This method exhibits its validity without frequency limitation mathematically. It can deal with most kinds of vertical interconnects including bond-wires, micro-bumps and through-silicon-vias (TSVs). Details of equations and measurement procedure are reported in this work. The bump in flip-chip process is taken as an example. The analysis is depicted and the measured results are performed for verification up to 20 GHz.