{"title":"Exploiting Hybrid Analysis in Solving Electrical Networks","authors":"V. Sankar, H. Narayanan, S. Patkar","doi":"10.1109/VLSI.Design.2009.27","DOIUrl":null,"url":null,"abstract":"In this paper we use topological hybrid analysis (mixture of nodal analysis and loop analysis) to solve circuits with resistors, voltage sources, current sources and diodes with exponential characteristics. In topological hybrid analysis[3], from the given network two smaller circuits are derived and solved simultaneously satisfying certain boundary conditions and this results in a solution of the original network. Our main emphasis is on non planar circuits with a large conductance range. The reason for this is that for nonplanar circuits preconditioned Conjugate Gradient method seems to perform very well but its convergence will be adversely affected once the ratio of maximum to minimum conductance becomes as high as 10 raised to 8. To overcome this problem we use Hybrid analysis and a variation of Conjugate Gradient method. Using this method we analyzed circuits containing resistors with large range of values, voltage sources and current sources and having size up to 1 million nodes and 3 million edges on 3GHZ pentium IV processor with 2GB RAM in less than 4 minutes. Also, we report the simulation timings for circuits containing diodes.","PeriodicalId":267121,"journal":{"name":"2009 22nd International Conference on VLSI Design","volume":"22 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2009-01-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2009 22nd International Conference on VLSI Design","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSI.Design.2009.27","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
In this paper we use topological hybrid analysis (mixture of nodal analysis and loop analysis) to solve circuits with resistors, voltage sources, current sources and diodes with exponential characteristics. In topological hybrid analysis[3], from the given network two smaller circuits are derived and solved simultaneously satisfying certain boundary conditions and this results in a solution of the original network. Our main emphasis is on non planar circuits with a large conductance range. The reason for this is that for nonplanar circuits preconditioned Conjugate Gradient method seems to perform very well but its convergence will be adversely affected once the ratio of maximum to minimum conductance becomes as high as 10 raised to 8. To overcome this problem we use Hybrid analysis and a variation of Conjugate Gradient method. Using this method we analyzed circuits containing resistors with large range of values, voltage sources and current sources and having size up to 1 million nodes and 3 million edges on 3GHZ pentium IV processor with 2GB RAM in less than 4 minutes. Also, we report the simulation timings for circuits containing diodes.