Compact 200V Diode Constructed on Thick SOI Wafer

J. Pjencak, Ladislav Seliga
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Abstract

In the recent decade, the modern Smart Power Applications drive BCD technologies to higher voltage nodes (>100V), lower cost and isolation improvement. Thick SOI technology is one of the options providing sufficient breakdown and desired power. Doping of device wafer is setup low to support necessary spread of depletion region. Typical HV diode is made by implanting a layer of opposite dopant type. Lateral distance between anode and cathode contacts is then defining diode area and become more significant for higher operating voltage. Our work demonstrates a new approach that enable significantly smaller size without additional cost.
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在厚SOI晶圆上构造的紧凑的200V二极管
近十年来,现代智能电源应用将BCD技术推向更高的电压节点(>100V),更低的成本和隔离改进。厚SOI技术是提供足够击穿和所需功率的选择之一。器件晶片的掺杂设置较低,以支持必要的耗尽区扩展。典型的高压二极管是通过植入一层相反类型的掺杂而制成的。阳极和阴极触点之间的横向距离定义了二极管的面积,并且在较高的工作电压下变得更加重要。我们的工作展示了一种新的方法,可以在不增加成本的情况下实现更小的尺寸。
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