Fast model order reduction of RC networks with very large order and port count

Abstract

We present a scalable method for the model order reduction of very large RC circuits. Such circuits arise in the modeling of on-chip power distribution networks. The method achieves moment matching with efficient Householder transformations and sparse matrix factorizations. It preserves passivity and generate sparse, efficient models. It overcomes the limited scalability of standard Krylov methods, that become inefficient beyond a few hundreds of ports. Numerical results demonstrate the superior performance of the proposed method in terms of reduction time and model efficiency. Scalability is demonstrated up to 1.2 million nodes and 2,400 ports.