Zero leakage microcontroller with 384ns wakeup time using FRAM mini-array architecture

Sudhanshu Khanna, Steven Bartling, M. Clinton, S. Summerfelt, John A. Rodriguez, H. McAdams
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引用次数: 3

Abstract

Catalog ULP microcontrollers (MCUs) have to balance the needs of diverse customers by providing high performance along with near zero standby power and fast wakeup times for real time applications. We present a full HVT 8MHz 75uA/MHz Non-Volatile Logic (NVL) based MCU that has zero standby power and an ultrafast 384ns wakeup time. Non-volatile mini-arrays distributed throughout the logic domain of the MCU snapshot the state of all sequential elements before the MCU goes into a power gated standby mode. Upon wakeup no bootup is required. A high bandwidth parallel connection between the flipflops and mini-arrays helps achieve fast MCU wakeup. NVL has no impact on MCU active mode performance and power and adds only 3.6% to the SoC area. By eliminating leakage in standby mode, NVL allows use of high performance leaky processes in MCU design. We present results from a second generation full SVT 32MHz NVL MCU. The SVT SoC has 4x higher active mode performance or 30% lower active energy than the HVT SoC, but can still achieve zero leakage using NVL.
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采用FRAM微阵列架构的384ns唤醒时间的零泄漏微控制器
目录ULP微控制器(mcu)必须通过为实时应用提供高性能以及接近零的待机功率和快速唤醒时间来平衡不同客户的需求。我们提出了一个全HVT 8MHz 75uA/MHz基于非易失性逻辑(NVL)的MCU,具有零待机功率和超快的384ns唤醒时间。在MCU进入电源门控待机模式之前,分布在整个MCU逻辑域的非易失性微型阵列快照所有顺序元件的状态。在唤醒时,不需要启动。触发器和微型阵列之间的高带宽并行连接有助于实现快速MCU唤醒。NVL对MCU有源模式性能和功率没有影响,仅增加了3.6%的SoC面积。通过消除待机模式下的泄漏,NVL允许在MCU设计中使用高性能泄漏工艺。我们介绍了第二代全SVT 32MHz NVL MCU的结果。SVT SoC的有源模式性能比HVT SoC高4倍,有源能量比HVT SoC低30%,但使用NVL仍然可以实现零泄漏。
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