T. Hashimoto, Y. Nonaka, T. Tominari, H. Fujiwara, K. Tokunaga, M. Arai, S. Wada, T. Udo, M. Seto, M. Miura, H. Shimamoto, K. Washio, H. Tomioka
{"title":"Direction to improve SiGe BiCMOS technology featuring 200-GHz SiGe HBT and 80-nm gate CMOS","authors":"T. Hashimoto, Y. Nonaka, T. Tominari, H. Fujiwara, K. Tokunaga, M. Arai, S. Wada, T. Udo, M. Seto, M. Miura, H. Shimamoto, K. Washio, H. Tomioka","doi":"10.1109/IEDM.2003.1269182","DOIUrl":null,"url":null,"abstract":"200 GHz f/sub T/ SiGe HBTs and 80 nm gate CMOS were successfully integrated using the LP-CVD technique for selective SiGe epitaxial growth. Suppressing base resistance enabled us to achieve f/sub MAX/ of 227 GHz, corresponding to f/sub T/ of 201 GHz. Shrunk HBTs of A/sub E/=0.15/spl times/0.7 /spl mu/m/sup 2/ achieved ECL ring oscillator gate delay of 5.3 ps at Ics=1.2 mA. Self-heating effects on junction temperature and device performance were investigated with an emitter-width scaling effect. A low thermal budget HBT process sustains full compatibility with 0.13 /spl mu/m platforms for large scaled RF ICs.","PeriodicalId":344286,"journal":{"name":"IEEE International Electron Devices Meeting 2003","volume":"4 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2003-12-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"32","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE International Electron Devices Meeting 2003","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IEDM.2003.1269182","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 32
Abstract
200 GHz f/sub T/ SiGe HBTs and 80 nm gate CMOS were successfully integrated using the LP-CVD technique for selective SiGe epitaxial growth. Suppressing base resistance enabled us to achieve f/sub MAX/ of 227 GHz, corresponding to f/sub T/ of 201 GHz. Shrunk HBTs of A/sub E/=0.15/spl times/0.7 /spl mu/m/sup 2/ achieved ECL ring oscillator gate delay of 5.3 ps at Ics=1.2 mA. Self-heating effects on junction temperature and device performance were investigated with an emitter-width scaling effect. A low thermal budget HBT process sustains full compatibility with 0.13 /spl mu/m platforms for large scaled RF ICs.