{"title":"Design of a 12Gb/s transceiver for high-density links with discontinuities using modal signaling","authors":"P. Milosevic, J. Schutt-Ainé","doi":"10.1109/EPEPS.2011.6100230","DOIUrl":null,"url":null,"abstract":"In high-speed chip-to-chip single-ended signaling links, far-end crosstalk presents one of the dominant noise sources, limiting the link performance. Diagonalizing the channel using modal decomposition has been proposed to mitigate the crosstalk, but so far only the transceiver designed for uniform low-loss homogenous media channels has been investigated. In this paper, the design of a transceiver system which takes advantage of modal decomposition over a typical memory bus with discontinuities is presented. The proposed approach is verified using circuit-based link simulation.","PeriodicalId":313560,"journal":{"name":"2011 IEEE 20th Conference on Electrical Performance of Electronic Packaging and Systems","volume":"13 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-12-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2011 IEEE 20th Conference on Electrical Performance of Electronic Packaging and Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EPEPS.2011.6100230","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 6
Abstract
In high-speed chip-to-chip single-ended signaling links, far-end crosstalk presents one of the dominant noise sources, limiting the link performance. Diagonalizing the channel using modal decomposition has been proposed to mitigate the crosstalk, but so far only the transceiver designed for uniform low-loss homogenous media channels has been investigated. In this paper, the design of a transceiver system which takes advantage of modal decomposition over a typical memory bus with discontinuities is presented. The proposed approach is verified using circuit-based link simulation.