Improving area efficiency of residue number system based implementation of DSP algorithms

Proceedings Twelfth International Conference on VLSI Design. (Cat. No.PR00013) Pub Date : 1999-01-10 DOI:10.1109/ICVD.1999.745179

M. Mahesh, Satrajit Gupta, M. Mehendale

引用次数: 1

Abstract

Residue Number System based applications involve modulo-arithmetic which is typically implemented using look-up-tables (LUTs) for a small value of modulus. In this paper we present a data coding technique to minimize the area of these LUTs when implemented using two level logic structures such as PLAs. We also present a technique that exploits the symmetry in these computations to further optimize the LUTs. Results show that area improvement of upto 66% can be achieved using these techniques.

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基于DSP算法的实现提高了残数系统的面积效率

基于剩余数系统的应用涉及模运算，通常使用查找表(LUTs)来实现一个小的模值。在本文中，我们提出了一种数据编码技术，当使用诸如pla的两级逻辑结构实现时，可以将这些lut的面积最小化。我们还提出了一种利用这些计算中的对称性来进一步优化lut的技术。结果表明，使用这些技术可以实现高达66%的面积改善。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Proceedings Twelfth International Conference on VLSI Design. (Cat. No.PR00013)

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