Shadow step structures for the analysis of thin film conductors

W.C. Rosvold
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Abstract

A description is given of research on shadow step structures (3S), which are prepatterned, mesa-type geometries that are electrically self-isolating and self-aligning when overlaid with a conducting film. This basic mesa topography has been historically used as a disposable medium for lift-off metallization and other generic patterning forms. A modification of this technique has recently been useful in providing an analytic tool for the maskless evaluation of as-deposited thin-film conductors. On an experimental basis, 3S is being used as an intermediate means to verify the sheet resistivity and tempco of sichrome resistor films. Also, the formation of electromigration patterns is used as a simplified, nonintrusive alternative to the current fabrication method. The 3S technique is being evaluated for other QTAT analyses including the quantifying of physical film stress and Schottky diodes, together with other bulk silicon devices which evaluate metal-silicon interfaces.<>
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用于薄膜导体分析的影阶结构
本文描述了阴影阶梯结构(3S)的研究,它是一种预图型的台面型几何结构,在覆盖导电膜时具有电自隔离和自对准功能。这种基本的台地地形在历史上被用作升空金属化和其他一般图案形式的一次性介质。该技术的一种改进最近被用于为沉积薄膜导体的无掩膜评价提供一种分析工具。在实验基础上,利用3S作为中间手段来验证铬色电阻薄膜的片电阻率和温度。此外,电迁移模式的形成被用作当前制造方法的一种简化的、非侵入性的替代方法。3S技术正在被评估用于其他QTAT分析,包括物理薄膜应力和肖特基二极管的量化,以及其他评估金属-硅界面的大块硅器件
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