Jongmin Lee, Minsun Kim, Gicheol Shin, Yoonmyung Lee
{"title":"A 20F2 Area-Efficient Differential nand-Structured Physically Unclonable Function for Low-Cost IoT Security","authors":"Jongmin Lee, Minsun Kim, Gicheol Shin, Yoonmyung Lee","doi":"10.1109/ESSCIRC.2019.8902680","DOIUrl":null,"url":null,"abstract":"A differential NAND-structured physically unclonable function (PUF) with 20F2 area per bit is proposed for cost-effective Internet of Things applications. With the area-efficient NAND-array structure, a key bit is generated from a pair of minimum-sized nMOS transistors by effectively amplifying threshold voltage (Vth) mismatch. By utilizing the near-threshold current of the examined transistors, high sensitivity to Vth variation, which is desired for stability, and faster operation than leakage current-based PUFs is achieved. An offset-compensated comparison scheme is provided to accurately determine the key value without bias. The proposed PUF achieves 0.06% BER and 0.53% unstable bits with TMV11 while reducing the area by an order of magnitude compared with state-of-the-art CMOS-based PUFs.","PeriodicalId":402948,"journal":{"name":"ESSCIRC 2019 - IEEE 45th European Solid State Circuits Conference (ESSCIRC)","volume":"9 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"ESSCIRC 2019 - IEEE 45th European Solid State Circuits Conference (ESSCIRC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESSCIRC.2019.8902680","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
A differential NAND-structured physically unclonable function (PUF) with 20F2 area per bit is proposed for cost-effective Internet of Things applications. With the area-efficient NAND-array structure, a key bit is generated from a pair of minimum-sized nMOS transistors by effectively amplifying threshold voltage (Vth) mismatch. By utilizing the near-threshold current of the examined transistors, high sensitivity to Vth variation, which is desired for stability, and faster operation than leakage current-based PUFs is achieved. An offset-compensated comparison scheme is provided to accurately determine the key value without bias. The proposed PUF achieves 0.06% BER and 0.53% unstable bits with TMV11 while reducing the area by an order of magnitude compared with state-of-the-art CMOS-based PUFs.