{"title":"Geometry modeling method for narrow/short and narrow MOSFETs","authors":"S. Sekine, M. Sugiyama, N. Saito","doi":"10.1109/ICMTS.1999.766229","DOIUrl":null,"url":null,"abstract":"In this paper, we present a new physics-based model for narrow width MOSFETs that accounts for the LOCOS narrow width effect and the webbing effect. The model is based on physical geometry changes of MOSFETs that are caused by the changes in field edge shape during LOCOS isolation and consecutive oxide etch, and the webbing effect of lithography for the dog-bone layout. It allows the use of a single set of parameters for any combination of MOSFET widths and lengths without geometry binning. We also discuss details of the test structures and the modeling procedure, and model implementation in SPICE simulation.","PeriodicalId":273071,"journal":{"name":"ICMTS 1999. Proceedings of 1999 International Conference on Microelectronic Test Structures (Cat. No.99CH36307)","volume":"229 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1999-03-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"ICMTS 1999. Proceedings of 1999 International Conference on Microelectronic Test Structures (Cat. No.99CH36307)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICMTS.1999.766229","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
In this paper, we present a new physics-based model for narrow width MOSFETs that accounts for the LOCOS narrow width effect and the webbing effect. The model is based on physical geometry changes of MOSFETs that are caused by the changes in field edge shape during LOCOS isolation and consecutive oxide etch, and the webbing effect of lithography for the dog-bone layout. It allows the use of a single set of parameters for any combination of MOSFET widths and lengths without geometry binning. We also discuss details of the test structures and the modeling procedure, and model implementation in SPICE simulation.
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