Self-Parameterized Chaotic Map: A Hardware-efficient Scheme Providing Wide Chaotic Range

Abstract

We present a general method called “self-parameterization” for designing one-dimensional (1-D) chaotic maps that provide wider chaotic regions than existing 1-D maps. A wide chaotic range is a desirable property as it strengthens the security feature by enlarging the design space in many hardware-security applications, including reconfigurable logic and encryption. The proposed self-parameterized scheme reduces the hardware cost by involving only one chaotic map that modulates its own control parameter at every iteration by passing the map's previous output through a simple linear transformation. The widening of chaotic range after adding self-parameterization is demonstrated on three classical map functions: logistic, tent, and sine. Two hardware-efficient self-parameterized schemes are presented: one for field-programmable gate array (FPGA) implementation and the other one for integrated circuit (IC) implementation. The chaotic performance of the proposed scheme is evaluated with bifurcation plots and three established chaotic entropy metrics including, Lyapunov exponent, correlation coefficient, and correlation dimension.