Thermal Management in Direct Chip Attach Assemblies

Abstract

Direct chip attach packaging technologies are finding increasing application in electronics manufacturing particularly in telecommunications and consumer electronics. In these systems, bare die with bumped interconnect bond pads are assembled in a flip chip configuration (i.e., active face down) directly to low-cost organic substrates. In this work, the thermal management of three direct chip attach technologies is investigated. Experimental measurements are conducted exploring the junction-to-ambient thermal resistance and thermal dissipation path for the three interconnect technologies which include solder attach, anisotropic adhesive attach, and isotropic adhesive attach. A first order chip-scale thermal design model is developed for flip chip assemblies exhibiting good agreement with the experimental measurements.