{"title":"A 12.8-MHz sigma-delta modulator with 16-bit performance","authors":"B. Brandt, D. Wingard, B. Wooley","doi":"10.1109/VLSIC.1990.111078","DOIUrl":null,"url":null,"abstract":"The authors describe a CMOS second-order Σ-Δ modulator that does not require error correction or component trimming to achieve virtually ideal 16-b performance at a conversion rate of 50 kHz. This modulator is a fully differential circuit that operates from a single 5-V power supply and does not require the use of precision sample-and-hold circuitry. With an oversampling ratio of 256 and a clock rate of 12.8 MHz, an experimental implementation of the modulator achieves a 98-dB dynamic range and 94-dB linearity. The nearly ideal 16-b performance of the modulator and its small area of 0.39 mm2 and power dissipation of only 13.8 mW make it suitable for use as a digital-audio quality analog interface within digital signal processing chips and systems","PeriodicalId":239990,"journal":{"name":"Digest of Technical Papers., 1990 Symposium on VLSI Circuits","volume":"16 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1990-06-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Digest of Technical Papers., 1990 Symposium on VLSI Circuits","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIC.1990.111078","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 6
Abstract
The authors describe a CMOS second-order Σ-Δ modulator that does not require error correction or component trimming to achieve virtually ideal 16-b performance at a conversion rate of 50 kHz. This modulator is a fully differential circuit that operates from a single 5-V power supply and does not require the use of precision sample-and-hold circuitry. With an oversampling ratio of 256 and a clock rate of 12.8 MHz, an experimental implementation of the modulator achieves a 98-dB dynamic range and 94-dB linearity. The nearly ideal 16-b performance of the modulator and its small area of 0.39 mm2 and power dissipation of only 13.8 mW make it suitable for use as a digital-audio quality analog interface within digital signal processing chips and systems