Application of In-situ Pre-epi Clean Process for Next Generation Semiconductor Devices

Abstract

As electronic devices are evolving to more diversified and specifically function-oriented applications, silicon-based semiconductors have shown their limitation to unprecedented functionality requirements such as high power, high frequency, and high temperature operation. Growing utilization of IV-IV compounds (e.g. SiGe, SiC), III-V compounds (e.g. GaAs, GaN) as well as hetero-epitaxial structures with Si has become an inevitable trend. Due to cost and size of SiC and GaN wafers, epitaxial deposition on Si is utilized. However, this requires an efficient pre-epitaxial wet cleaning of the Si wafer yielding the lowest defects possible. In this study, different HF-last processes were tested yielding that an in-situ process with dilute chemicals gives the best results.