S. Foti;C. Nevoloso;H. H. Khan;A. O. Di Tommaso;A. Testa;R. Miceli
{"title":"A Simple Carrier-Based Neutral Point Voltage Control Strategy for NPC Three-Level Inverters","authors":"S. Foti;C. Nevoloso;H. H. Khan;A. O. Di Tommaso;A. Testa;R. Miceli","doi":"10.1109/OJPEL.2025.3543247","DOIUrl":null,"url":null,"abstract":"This paper proposes a simple mixed-carrier-based PWM strategy driven through a hysteresis control to address the issues related to voltage imbalances and low-frequency oscillation in the DC-link capacitors voltage. The goal of this approach is to avoid extra power losses, power quality issues and reduced lifespan of capacitors by exploiting the features of conventional dual-carrier PWM strategies. This technique offers a remarkably low computational burden, outstanding performance in terms of power quality and losses, and it does not require additional power circuits. The proposed approach is first introduced theoretically, then its performance is exhaustively assessed through simulations and experimental tests by demonstrating a significant reduction of capacitor sizing. Additionally, an experimental performance comparison analysis is performed with a conventional three-level PWM strategy. Finally, to prove its merits with respect to other carrier-based PWM strategies proposed in the literature, a comparison in terms of current and voltage transducers, control algorithm complexity, computational cost and total harmonic distortion is provided.","PeriodicalId":93182,"journal":{"name":"IEEE open journal of power electronics","volume":"6 ","pages":"416-431"},"PeriodicalIF":5.0000,"publicationDate":"2025-02-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10891821","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE open journal of power electronics","FirstCategoryId":"1085","ListUrlMain":"https://ieeexplore.ieee.org/document/10891821/","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q1","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0
Abstract
This paper proposes a simple mixed-carrier-based PWM strategy driven through a hysteresis control to address the issues related to voltage imbalances and low-frequency oscillation in the DC-link capacitors voltage. The goal of this approach is to avoid extra power losses, power quality issues and reduced lifespan of capacitors by exploiting the features of conventional dual-carrier PWM strategies. This technique offers a remarkably low computational burden, outstanding performance in terms of power quality and losses, and it does not require additional power circuits. The proposed approach is first introduced theoretically, then its performance is exhaustively assessed through simulations and experimental tests by demonstrating a significant reduction of capacitor sizing. Additionally, an experimental performance comparison analysis is performed with a conventional three-level PWM strategy. Finally, to prove its merits with respect to other carrier-based PWM strategies proposed in the literature, a comparison in terms of current and voltage transducers, control algorithm complexity, computational cost and total harmonic distortion is provided.