A nano-scale n-bit ripple carry adder using an optimized XOR gate and quantum-dots technology with diminished cells and power dissipation

IF 2.9 4区 计算机科学 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC Nano Communication Networks Pub Date : 2023-06-01 DOI:10.1016/j.nancom.2023.100442
Seyed-Sajad Ahmadpour , Nima Jafari Navimipour , Mohammad Mosleh , Ali Newaz Bahar , Senay Yalcin
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引用次数: 6

Abstract

In the nano-scale era, quantum-dot cellular automata (QCA) technology has become an appealing substitute for transistor-based technologies. QCA will be the preferred technology for developing the next generation of digital systems. On the other hand, the full-adder and ripple carry adder (RCA) are the crucial building blocks of complex circuits, the most used structures in digital operations systems, and a practical part of the most well-known complex circuits in QCA technology. In addition, this technology was used to design the full adder for several procedures, like multiplication, subtraction, and division. For this reason, the full adder is generally investigated as a central unit and microprocessor in developing QCA technology. Furthermore, most previous QCA-based adder structures have suffered from some drawbacks, such as a high number of cells, high energy consumption, the high number of gates, and the placement of inputs and outputs in a closed loop; hence, the implementation of an efficient adder with only one gate and a low number of cells, such as exclusive-OR (XOR) gate, can solve all previous problems. Therefore, in this paper, a significantly improved structure of 3-input XOR is suggested based on the promising QCA technology. In addition, a QCA clocking mechanism and explicit cell interaction form the foundation of the proposed QCA-based XOR gate configuration. This gate can be easily converted into an adder circuit while containing a small number of cells and being extremely compressed. The suggested QCA-based XOR design is focused on optimizing a single-bit adder using cellular interaction. The suggested single-bit adder contains 14 cells. Based on this adder, several different RCAs, such as 4, 8, 16, and 32-bit, are designed. The comparison of the proposed single-bit adder to the best coplanar and multi-layer ones shows a 51.72% and 36.36% reduction of cells, respectively. In addition, all suggested designs are verified through simulation using QCADesigner and QCAPro. Finally, many physical validations are provided to approve the functionality of the suggested XOR design.

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一种纳米级n位纹波进位加法器,使用优化的XOR门和量子点技术,减少了单元和功耗
在纳米时代,量子点细胞自动机(QCA)技术已成为基于晶体管的技术的一种有吸引力的替代品。QCA将是开发下一代数字系统的首选技术。另一方面,全加法器和纹波进位加法器(RCA)是复杂电路的关键组成部分,是数字运算系统中最常用的结构,也是QCA技术中最著名的复杂电路的实用部分。此外,这项技术还用于设计乘法、减法和除法等多个程序的全加法器。因此,在开发QCA技术时,通常将全加器作为中央单元和微处理器进行研究。此外,大多数以前基于QCA的加法器结构都存在一些缺点,例如单元数量多、能耗高、门数量多以及输入和输出在闭环中的布置;因此,实现只有一个门和少量单元的高效加法器,例如异或(XOR)门,可以解决以前的所有问题。因此,本文在有前景的QCA技术的基础上,提出了一种显著改进的三输入XOR结构。此外,QCA时钟机制和显式单元交互构成了所提出的基于QCA的XOR门配置的基础。该门可以很容易地转换为加法器电路,同时包含少量单元并被极度压缩。建议的基于QCA的XOR设计侧重于使用蜂窝交互来优化单比特加法器。建议的单比特加法器包含14个单元。基于该加法器,设计了4、8、16和32位等几种不同的RCA。将所提出的单比特加法器与最佳共面和多层加法器的比较显示,单元分别减少了51.72%和36.36%。此外,所有建议的设计都通过QCADesigner和QCAPro进行了仿真验证。最后,提供了许多物理验证来批准所建议的XOR设计的功能。
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来源期刊
Nano Communication Networks
Nano Communication Networks Mathematics-Applied Mathematics
CiteScore
6.00
自引率
6.90%
发文量
14
期刊介绍: The Nano Communication Networks Journal is an international, archival and multi-disciplinary journal providing a publication vehicle for complete coverage of all topics of interest to those involved in all aspects of nanoscale communication and networking. Theoretical research contributions presenting new techniques, concepts or analyses; applied contributions reporting on experiences and experiments; and tutorial and survey manuscripts are published. Nano Communication Networks is a part of the COMNET (Computer Networks) family of journals within Elsevier. The family of journals covers all aspects of networking except nanonetworking, which is the scope of this journal.
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