Javeed Iqbal Reshi, M․Tariq Banday, Farooq A. Khanday
{"title":"Modelling of novel ultra-efficient single layer nano-scale adder-subtractor in QCA nanotechnology","authors":"Javeed Iqbal Reshi, M․Tariq Banday, Farooq A. Khanday","doi":"10.1016/j.nancom.2025.100564","DOIUrl":null,"url":null,"abstract":"<div><div>Quantum dot Cellular Automata is considered as promising alternative technology for designing nanoscale circuits. It operates on the principle derived from quantum mechanics and utilizes quantum dots as building blocks for information processing and computations. QCA offers numerous benefits including ultra-low energy dissipation, enhanced performance, high device density, resistance to scaling limitations and inherent parallelism. Previous realizations of Quantum Dot Cellular Automata (QCA) based-adder and subtractor circuits faced significant challenges like cell count, complexity and energy dissipation. This paper, proposes novel designs of adder-subtractor circuits based on novel 3-input XOR gate. The proposed circuits do not require any rotated cells or crossovers and are based on single layer design that eases the manufacturability. In addition, the proposed designs demonstrate significant reduction in cell count, complexity and energy dissipation compared to best known prior counterparts. Specifically, the reductions are 14.28 %, 42.85 %, and 56.66 % for adder, subtractor and adder-subtractor respectively. These improvements signify a substantial gain in circuit efficiency. The functional validity of the proposed layouts is verified using QCADesigner 2.0.3 simulator. The power efficiency analysis has been performed using QCADesigner-E tool, which enables the designer to analyse, optimize and validate the power consumption characteristics of the proposed circuits. The overall energy consumption of adder, subtractor and adder-subtractor is reported to be 1.10e-002 eV, 1.12e-002 eV, 1.06e-002 eV respectively. Additionally, the average energy dissipation of 9.96e-004 eV, 1.02e-003 eV, 9.63e-004 eV was observed using QCADesigner-E tool.</div></div>","PeriodicalId":54336,"journal":{"name":"Nano Communication Networks","volume":"43 ","pages":"Article 100564"},"PeriodicalIF":2.9000,"publicationDate":"2025-01-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Nano Communication Networks","FirstCategoryId":"94","ListUrlMain":"https://www.sciencedirect.com/science/article/pii/S187877892500002X","RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0
Abstract
Quantum dot Cellular Automata is considered as promising alternative technology for designing nanoscale circuits. It operates on the principle derived from quantum mechanics and utilizes quantum dots as building blocks for information processing and computations. QCA offers numerous benefits including ultra-low energy dissipation, enhanced performance, high device density, resistance to scaling limitations and inherent parallelism. Previous realizations of Quantum Dot Cellular Automata (QCA) based-adder and subtractor circuits faced significant challenges like cell count, complexity and energy dissipation. This paper, proposes novel designs of adder-subtractor circuits based on novel 3-input XOR gate. The proposed circuits do not require any rotated cells or crossovers and are based on single layer design that eases the manufacturability. In addition, the proposed designs demonstrate significant reduction in cell count, complexity and energy dissipation compared to best known prior counterparts. Specifically, the reductions are 14.28 %, 42.85 %, and 56.66 % for adder, subtractor and adder-subtractor respectively. These improvements signify a substantial gain in circuit efficiency. The functional validity of the proposed layouts is verified using QCADesigner 2.0.3 simulator. The power efficiency analysis has been performed using QCADesigner-E tool, which enables the designer to analyse, optimize and validate the power consumption characteristics of the proposed circuits. The overall energy consumption of adder, subtractor and adder-subtractor is reported to be 1.10e-002 eV, 1.12e-002 eV, 1.06e-002 eV respectively. Additionally, the average energy dissipation of 9.96e-004 eV, 1.02e-003 eV, 9.63e-004 eV was observed using QCADesigner-E tool.
期刊介绍:
The Nano Communication Networks Journal is an international, archival and multi-disciplinary journal providing a publication vehicle for complete coverage of all topics of interest to those involved in all aspects of nanoscale communication and networking. Theoretical research contributions presenting new techniques, concepts or analyses; applied contributions reporting on experiences and experiments; and tutorial and survey manuscripts are published.
Nano Communication Networks is a part of the COMNET (Computer Networks) family of journals within Elsevier. The family of journals covers all aspects of networking except nanonetworking, which is the scope of this journal.