Y. Okazaki, H. Matsui, M. M. Muhoro, M. Hagiwara, H. Akagi
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引用次数: 6
Abstract
This paper discusses both dc-voltage balancing and ac-voltage minimizing of all the floating capacitors in a modular multilevel cascade inverter (MMCI-DSCC) intended for medium-voltage high-power synchronous-motor drives. It presents theoretical and numerical design considerations on both amplitude and phase of three-phase motor currents. A three-phase DSCC inverter with phase-shifted-carrier pulsewidth modulation (PWM) is designed and constructed to drive a 370-V, 15-kW, 75-Hz, six-pole, interior-permanent-magnet synchronous motor loaded with a hypothetical centrifugal compressor. Experimental results show satisfactory performance in dc-voltage balancing and ac-voltage minimizing of all the capacitors.
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