{"title":"Combinatorial logic based forward converters in residue number systems","authors":"A. Premkumar, M. Bhardwaj","doi":"10.1109/ISCAS.2000.857428","DOIUrl":null,"url":null,"abstract":"The Residue Number System (RNS) offers unlimited opportunities for high performance arithmetic provided efficient forward and reverse converters could be constructed for the moduli set at hand. All forward conversion proposals to date, require some form of Read Only Memory (ROM) along with computational elements like Full Adders (FA). In this paper, we show that by formulating the forward conversion problem in terms of modular exponentiation and addition, we can achieve memory free conversion. We generalize our solution such that bit serial and bit parallel implementations can be derived by simply varying a parameter, namely, multiplexers. Apart from this formulation itself, the paper makes two other contributions. Firstly, it demonstrates an entirely new set of converters that use no look up. Secondly, we show how conversion complexity can be reduced significantly by sharing circuitry over several forward converters.","PeriodicalId":6422,"journal":{"name":"2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings (IEEE Cat No.00CH36353)","volume":"32 1","pages":"317-320 vol.5"},"PeriodicalIF":0.0000,"publicationDate":"2000-05-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings (IEEE Cat No.00CH36353)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISCAS.2000.857428","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
The Residue Number System (RNS) offers unlimited opportunities for high performance arithmetic provided efficient forward and reverse converters could be constructed for the moduli set at hand. All forward conversion proposals to date, require some form of Read Only Memory (ROM) along with computational elements like Full Adders (FA). In this paper, we show that by formulating the forward conversion problem in terms of modular exponentiation and addition, we can achieve memory free conversion. We generalize our solution such that bit serial and bit parallel implementations can be derived by simply varying a parameter, namely, multiplexers. Apart from this formulation itself, the paper makes two other contributions. Firstly, it demonstrates an entirely new set of converters that use no look up. Secondly, we show how conversion complexity can be reduced significantly by sharing circuitry over several forward converters.