Paragkumar Thadesar, A. Dembla, Devin K. Brown, M. Bakir
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引用次数: 4
Abstract
To circumvent the performance and energy bottlenecks due to interconnects, novel interconnect solutions are needed both at the package and die levels. This paper reports (1) novel photodefined polymer-embedded vias within silicon interposers for improved through-silicon via insertion loss, and (2) ultrahigh density low-capacitance nanoscale TSVs with 100 nm diameter and 20:1 aspect ratio for fine-grain 3D IC implementation.
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