A 0.45-to-1.8 GHz Fully Synthesized Injection Locked Bang-Bang PLL with OFDAC to Enhance DCO resolution

Abstract

This paper presents a fully synthesized injection locked bang-bang phased-locked loop (SILBBPLL) with ultrafine DCO resolution. A novel ultra-fine frequency tuning block is proposed to improve the DCO resolution. A standard cell based output feedback DAC (OFDAC) is adopted for the ultra-fine frequency tuning. The proposed SILBBPLL is described in hardware language and automatically placed & routed by using standard digital circuit design flow. It is implemented in 65 nm CMOS with an active area of 0.008 mm. The measured results show that power consumption of the SILBBPLL operating at 1.5 GHz is 1.8 mW @0.8V. The integrated root-mean-square (RMS) jitter is equal to 0.91 ps. The SILBBPLL achieves a figure-ofmerit (FOMa) of -259.1 dB.