A 0.003 mm2 5.2 mW/tap 20 GBd inductor-less 5-tap analog RX-FFE

Abstract

A 0.003 mm2 5.2 mW/tap analog receive-side feedforward equalizer (RX-FFE) is demonstrated in 40 nm CMOS for up to 20 GBd ADC-based links. The FFE is constructed entirely with analog-inverter transconductors and capacitors, avoiding the use of area-intensive inductors. The delay element is implemented as a first-order Padé approximant of an ideal delay. The equalization performance is measured to be sufficient to relax the ADC resolution requirement by 1 bit. The total power consumed is less than 26 mW with less than 9.2 nV/√Hz output noise for all configurations.