High performance single grain si tfts inside a location-controlled grain by /spl mu/-czochralski process with capping layer

R. Vikas, R. Ishihara, Y. Hiroshima, D. Abe, S. Inoue, T. Shimoda, J. Metselaar, C. Beenakker
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引用次数: 18

Abstract

To enlarge the grain size of 2D location-controlled Si grain by mu-Czochralski process, capping layer (C/L) of SiO2 in excimer-laser crystallization of amorphous Si thin film has been employed. With a 50 nm thick SiO2 C/L on a 100 nm thick amorphous Si film, the diameter of the location-controlled grain was successfully increased up to 7.5 mum. Single-grain (SG) Si TFTs were fabricated inside a location-controlled grain with the SiO2 C/L as a part of the gate oxide. Field effect mobility (muFE) for electrons and holes of 510 cm2/Vs and of 210 cm2/Vs were obtained respectively
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采用/spl mu/-czochralski工艺,在具有封盖层的位置控制颗粒内实现高性能单粒生长
为了利用mu- chzochralski工艺扩大二维位置控制硅晶粒的晶粒尺寸,在准激光结晶非晶硅薄膜中采用了SiO2的封盖层(C/L)。在100 nm厚的非晶硅薄膜上添加50 nm厚的SiO2 C/L,成功地将定位控制晶粒的直径增加到7.5 nm。以二氧化硅C/L作为栅极氧化物的一部分,在位置控制的颗粒内制备了单晶硅tft。电子和空穴的场效应迁移率(muFE)分别为510 cm2/Vs和210 cm2/Vs
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