Spanning the spectrum of interconnects from trenches of double patterning to system level

Abstract

Summary form only given. This talk covers the fascinating aspects of the whole spectrum of interconnects from trenches of silicon in nanometers to multi-millimeter long wires at system level and how common principles govern them. This talk starts at the silicon level, where double and triple patterning is becoming more common at lower level interconnects and these offer unique challenges and opportunities in manufacturability, variability and signal/power integrities. Then, it covers the CMP and inter-layer variation induced challenges and opportunities at global interconnects in silicon and expands to interposer and TSV aspects. This is followed by package and board level challenges and opportunities in manufacturability, electromagnetic interference and signal/power integrities. A concept of `Interconnect Continuum' is introduced to show how viewing the whole spectrum in continuity helps in optimizing performance, power, cost and overall reliability.