F. Zhang, P. Huang, B. Chen, D. Yu, Y. Fu, L. Ma, B. Gao, L. Liu, X. Liu, J. Kang
{"title":"Rectifying characteristics and implementation of n-Si/HfO2 based devices for 1D1R-based cross-bar memory array","authors":"F. Zhang, P. Huang, B. Chen, D. Yu, Y. Fu, L. Ma, B. Gao, L. Liu, X. Liu, J. Kang","doi":"10.1109/SNW.2012.6243357","DOIUrl":null,"url":null,"abstract":"Excellent rectifying characteristics are demonstrated in the fab-friendly n-Si/HfO2/Ni/TiN devices with rectification ratio of >;107 and the driving current of 1mA as a 1D-like selector. The rectified unipolar switching behaviors are demonstrated in the 1D1R cell structured with a diode-like device of n-Si/HfO2/Ni/TiN (1D) and a unipolar RRAM of n+-Si/HfOx/Ni/TiN (1R). Based on the measured I-V characteristics, these excellent selection behavior can be implemented in the cross-bar memory array of >;64K bits RRAM with large read margin.","PeriodicalId":6402,"journal":{"name":"2012 IEEE Silicon Nanoelectronics Workshop (SNW)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2012-06-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 IEEE Silicon Nanoelectronics Workshop (SNW)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SNW.2012.6243357","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
Excellent rectifying characteristics are demonstrated in the fab-friendly n-Si/HfO2/Ni/TiN devices with rectification ratio of >;107 and the driving current of 1mA as a 1D-like selector. The rectified unipolar switching behaviors are demonstrated in the 1D1R cell structured with a diode-like device of n-Si/HfO2/Ni/TiN (1D) and a unipolar RRAM of n+-Si/HfOx/Ni/TiN (1R). Based on the measured I-V characteristics, these excellent selection behavior can be implemented in the cross-bar memory array of >;64K bits RRAM with large read margin.
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