The impact of the carrier transport on the random dopant induced drain current variation in the saturation regime of advanced strained-silicon CMOS devices

Abstract

The variation of saturation drain current (I_d,sat), induced by the random dopant variation (RDF), has been extensively studied by a new multivariate analysis method. It was found that the variation of I_d,sat is originated from V_th,sat and saturation velocity (V_sat), while the variation of V_th,sat comes from the drain induced barrier lowering (DIBL). However, the experimental results shows that V_sat dominates the variation of I_d,sat. From the transport theory, V_sat is further decomposed into V_inj and B_sat, showing that V_inj is the dominant factor of I_d,sat variation. The faster the V_inj is, the less the I_d,sat variation becomes. If one improves the injection velocity, then the variation of I_d,sat can be suppressed. This has been one of the significant benefits of strained silicon technology in CMOS device scaling.