IMT-2000 terminal and its requirements for device technologies

K. Nagata
{"title":"IMT-2000 terminal and its requirements for device technologies","authors":"K. Nagata","doi":"10.1109/VLSIC.2000.852836","DOIUrl":null,"url":null,"abstract":"In this paper the requirements for devices such as LSI, DSP, LCD etc. are described from the IMT-2000 mobile terminal point of view. The article also mentions the mobile telecommunication's generations, its current market and service, IMT-2000 standardization status and the real system development in Japan so as to better understand its background.","PeriodicalId":6361,"journal":{"name":"2000 Symposium on VLSI Circuits. Digest of Technical Papers (Cat. No.00CH37103)","volume":"4 1","pages":"2-5"},"PeriodicalIF":0.0000,"publicationDate":"2000-06-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2000 Symposium on VLSI Circuits. Digest of Technical Papers (Cat. No.00CH37103)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIC.2000.852836","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 6

Abstract

In this paper the requirements for devices such as LSI, DSP, LCD etc. are described from the IMT-2000 mobile terminal point of view. The article also mentions the mobile telecommunication's generations, its current market and service, IMT-2000 standardization status and the real system development in Japan so as to better understand its background.
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IMT-2000终端及其对设备技术的要求
本文从IMT-2000移动终端的角度阐述了对LSI、DSP、LCD等器件的要求。本文还介绍了日本移动通信的代际、市场和业务现状、IMT-2000标准化现状和实际系统发展情况,以便更好地了解日本移动通信的发展背景。
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