{"title":"Role of hydrogen anneal in thin gate oxide for multi-metal-layer CMOS process","authors":"Y. Lee, R. Nachman, K. Seshan, D. Kau, N. Mielke","doi":"10.1109/RELPHY.2000.843912","DOIUrl":null,"url":null,"abstract":"This work investigated the impact of H/sub 2/ gas in the final annealing cycle of a 5-metal-layer CMOS process and its effect on MOS device behavior in the presence of Al/Ti metallization. The role of H/sub 2/ was evaluated with transistor electrical testing and with gate-oxide stressing, namely, bias-temperature and hot-carrier injection. Both electrical testing and stressing data showed no difference in device behavior when different external H/sub 2/% was used. However, some differences in PMOSFET bias-temp were observed when the annealing cycle was totally eliminated. Moreover, some differences were observed for devices with different metal coverage. This paper details the results and proposes a model to explain the observations.","PeriodicalId":6387,"journal":{"name":"2000 IEEE International Reliability Physics Symposium Proceedings. 38th Annual (Cat. No.00CH37059)","volume":"33 1","pages":"186-190"},"PeriodicalIF":0.0000,"publicationDate":"2000-04-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2000 IEEE International Reliability Physics Symposium Proceedings. 38th Annual (Cat. No.00CH37059)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RELPHY.2000.843912","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 6
Abstract
This work investigated the impact of H/sub 2/ gas in the final annealing cycle of a 5-metal-layer CMOS process and its effect on MOS device behavior in the presence of Al/Ti metallization. The role of H/sub 2/ was evaluated with transistor electrical testing and with gate-oxide stressing, namely, bias-temperature and hot-carrier injection. Both electrical testing and stressing data showed no difference in device behavior when different external H/sub 2/% was used. However, some differences in PMOSFET bias-temp were observed when the annealing cycle was totally eliminated. Moreover, some differences were observed for devices with different metal coverage. This paper details the results and proposes a model to explain the observations.