{"title":"A 0.025% DC Current Mismatch Charge Pump for PLL Applications","authors":"Shengyu Liang, Youze Xin, Chenglong Liang, Bing Zhang, Yanlong Zhang, Xiaoli Wang, Li Geng","doi":"10.1109/MWSCAS47672.2021.9531880","DOIUrl":null,"url":null,"abstract":"Charge pump (CP) based PLL is one of the most popular techniques because of its wide capture range and zero static phase offset. An op-amp is used to achieve dynamic current matching in the conventional double op-amp CP. This paper proposes a CP, which adopts simple level shift source follower to match the output voltages of two current mirrors when the output voltage of CP changes. Because one of the high-speed op-amps is deleted, the power consumption and area are cut down without sacrificing the current matching performance. The proposed CP achieves less than 0.025% DC current mismatch with 400 μA charge pump current under 1.2V supply when the output voltage changes from 0.3V to 0.9V in a standard 55 nm CMOS process.","PeriodicalId":6792,"journal":{"name":"2021 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS)","volume":"474 1","pages":"700-703"},"PeriodicalIF":0.0000,"publicationDate":"2021-08-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MWSCAS47672.2021.9531880","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
Charge pump (CP) based PLL is one of the most popular techniques because of its wide capture range and zero static phase offset. An op-amp is used to achieve dynamic current matching in the conventional double op-amp CP. This paper proposes a CP, which adopts simple level shift source follower to match the output voltages of two current mirrors when the output voltage of CP changes. Because one of the high-speed op-amps is deleted, the power consumption and area are cut down without sacrificing the current matching performance. The proposed CP achieves less than 0.025% DC current mismatch with 400 μA charge pump current under 1.2V supply when the output voltage changes from 0.3V to 0.9V in a standard 55 nm CMOS process.