A. Baschirotto, D. Bijno, R. Castello, F. Montecchi
{"title":"A 1 V 1.2 /spl mu/W 4th order bandpass switched-opamp SC filter for a cardiac pacer sensing stage","authors":"A. Baschirotto, D. Bijno, R. Castello, F. Montecchi","doi":"10.1109/ISCAS.2000.856024","DOIUrl":null,"url":null,"abstract":"A 4th-order bandpass switched-capacitor (SC) filter to be used as a part of an implantable device has been designed. The power consumption reduction is a key feature of such a system. This has been achieved by using a 1 V supply (SC operation are guaranteed by using the switched-opamp technique). In addition the active devices operate in the subthreshold region. The filter uses a fully differential topology to reduce the clock feedthrough noise and increase the dynamic range. The filter has been designed in a 0.35 /spl mu/m CMOS technology. It operates at 1 kHz sampling frequency and it consumes about 1.2 /spl mu/W.","PeriodicalId":6422,"journal":{"name":"2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings (IEEE Cat No.00CH36353)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2000-05-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"11","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings (IEEE Cat No.00CH36353)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISCAS.2000.856024","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 11
Abstract
A 4th-order bandpass switched-capacitor (SC) filter to be used as a part of an implantable device has been designed. The power consumption reduction is a key feature of such a system. This has been achieved by using a 1 V supply (SC operation are guaranteed by using the switched-opamp technique). In addition the active devices operate in the subthreshold region. The filter uses a fully differential topology to reduce the clock feedthrough noise and increase the dynamic range. The filter has been designed in a 0.35 /spl mu/m CMOS technology. It operates at 1 kHz sampling frequency and it consumes about 1.2 /spl mu/W.