CMOS analog neurofuzzy prototype based on ANFIS

2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings (IEEE Cat No.00CH36353) Pub Date : 2000-05-28 DOI:10.1109/ISCAS.2000.856163

O. Arellano-Cárdenas, H. Molina-Lozano, J. Moreno-Cadenas, F. Gómez-Castañeda, L. M. Flores-Nava

引用次数: 6

Abstract

The architecture called ANFIS (Adaptive Neuro-Fuzzy Inference System) proposed by J.R. Jang (1993) is divided in five layers. Layers 1 and 2 in ANFIS were built by using a double-differential amplifier and a winner takes all circuit; to implement layers 3, 4 and 5, CMOS translinear blocks are used. The complete ANFIS architecture is implemented on a circuit board, using two CMOS circuits (N-well and 2 /spl mu/m minimum dimensions). The total system has two inputs with three membership functions each one, which generate a fuzzy space with nine subspaces and one single output. The system is used for classification of electrical signals.

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基于ANFIS的CMOS模拟神经模糊原型

J.R. Jang(1993)提出的自适应神经模糊推理系统(ANFIS)分为五层。ANFIS的第1层和第2层采用双差分放大器和赢家通吃电路构建;为了实现第3层、第4层和第5层，使用了CMOS线性块。完整的ANFIS架构在电路板上实现，使用两个CMOS电路(最小尺寸为n阱和2 /spl mu/m)。整个系统有两个输入，每个输入有三个隶属函数，产生一个有九个子空间和一个输出的模糊空间。该系统用于电信号的分类。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings (IEEE Cat No.00CH36353)

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