K. Joo, Xiofeng Wang, J. Han, Seung-Hyun Lim, Seungjae Baik, Yong-Won Cha, Jin-Wook Lee, I. Yeo, Y. Cha, I. Yoo, U. Chung, J. Moon, B. Ryu
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引用次数: 3
Abstract
In this work, we propose a MHSOS (metal gate/high-k/SRO(silicon-rich oxide)/SiO2/Si) structure showing large memory window (> 4V) with fast P/E speed (plusmn18 V, 200 mus). The erase speed is featuring faster than that of Si3 N4 and has a retention time of 10 years for 10 % charge loss. These excellent properties were obtained through the modification of the transition layer between Si-NC and SiO2 matrix in an SRO medium, as well as tunneling/blocking dielectric material optimization