Progress in dislocation stress field model and its appications

U. Kwon, Jeong-Guk Min, Seon-Young Lee, Alexander Schmidt, D. Kim, Yasuyuki Kayama, Yutaka Nishizawa, Kiyoshi Ishikawa
{"title":"Progress in dislocation stress field model and its appications","authors":"U. Kwon, Jeong-Guk Min, Seon-Young Lee, Alexander Schmidt, D. Kim, Yasuyuki Kayama, Yutaka Nishizawa, Kiyoshi Ishikawa","doi":"10.1109/SISPAD.2019.8870500","DOIUrl":null,"url":null,"abstract":"TCAD prediction of the stress field generated by dislocation is crucial for the optimization of stressors for next generation logic devices. In this paper, we present a new hybrid approach for dislocation stress field calculation and its application to strained Si devices. New methodology combines an analytic stress field model for dislocation cores and consecutive FEM stress solving to get mechanical equilibrium. It was applied to the design optimization of dislocation stress memorization technique (D-SMT), its local layout effect (LLE) modeling, and the relaxation of lattice mismatch strain at Si/SiGe interface which degrades eSiGe stress. All the simulation results were verified with experimental results.","PeriodicalId":6755,"journal":{"name":"2019 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)","volume":"19 1","pages":"1-4"},"PeriodicalIF":0.0000,"publicationDate":"2019-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SISPAD.2019.8870500","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1

Abstract

TCAD prediction of the stress field generated by dislocation is crucial for the optimization of stressors for next generation logic devices. In this paper, we present a new hybrid approach for dislocation stress field calculation and its application to strained Si devices. New methodology combines an analytic stress field model for dislocation cores and consecutive FEM stress solving to get mechanical equilibrium. It was applied to the design optimization of dislocation stress memorization technique (D-SMT), its local layout effect (LLE) modeling, and the relaxation of lattice mismatch strain at Si/SiGe interface which degrades eSiGe stress. All the simulation results were verified with experimental results.
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
位错应力场模型及其应用研究进展
位错产生的应力场的TCAD预测对下一代逻辑器件的应力源优化至关重要。本文提出了一种新的位错应力场计算方法及其在应变硅器件中的应用。该方法将位错岩心的解析应力场模型与连续有限元应力求解相结合,得到力学平衡。将其应用于位错应力记忆技术(D-SMT)的设计优化、其局部布局效应(LLE)建模以及Si/SiGe界面点阵失配应变的松弛,从而降低eSiGe应力。仿真结果与实验结果进行了验证。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
Effect of Stacking Faults on the Thermoelectric Figure of Merit of Si Nanowires Effect of Trap on Carrier Transport in InAs FET with Al2 O3 Oxide: DFT-based NEGF simulations Defect creation and Diffusion under electric fields from first-principles: the prototypical case of silicon dioxide Quantum Transport Simulations of the Zero Temperature Coefficient in Gate-all-around Nanowire pFETs Electronic and structural properties of interstitial titanium in crystalline silicon from first-principles simulations
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1