U. Kwon, Jeong-Guk Min, Seon-Young Lee, Alexander Schmidt, D. Kim, Yasuyuki Kayama, Yutaka Nishizawa, Kiyoshi Ishikawa
{"title":"Progress in dislocation stress field model and its appications","authors":"U. Kwon, Jeong-Guk Min, Seon-Young Lee, Alexander Schmidt, D. Kim, Yasuyuki Kayama, Yutaka Nishizawa, Kiyoshi Ishikawa","doi":"10.1109/SISPAD.2019.8870500","DOIUrl":null,"url":null,"abstract":"TCAD prediction of the stress field generated by dislocation is crucial for the optimization of stressors for next generation logic devices. In this paper, we present a new hybrid approach for dislocation stress field calculation and its application to strained Si devices. New methodology combines an analytic stress field model for dislocation cores and consecutive FEM stress solving to get mechanical equilibrium. It was applied to the design optimization of dislocation stress memorization technique (D-SMT), its local layout effect (LLE) modeling, and the relaxation of lattice mismatch strain at Si/SiGe interface which degrades eSiGe stress. All the simulation results were verified with experimental results.","PeriodicalId":6755,"journal":{"name":"2019 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)","volume":"19 1","pages":"1-4"},"PeriodicalIF":0.0000,"publicationDate":"2019-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SISPAD.2019.8870500","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
TCAD prediction of the stress field generated by dislocation is crucial for the optimization of stressors for next generation logic devices. In this paper, we present a new hybrid approach for dislocation stress field calculation and its application to strained Si devices. New methodology combines an analytic stress field model for dislocation cores and consecutive FEM stress solving to get mechanical equilibrium. It was applied to the design optimization of dislocation stress memorization technique (D-SMT), its local layout effect (LLE) modeling, and the relaxation of lattice mismatch strain at Si/SiGe interface which degrades eSiGe stress. All the simulation results were verified with experimental results.